Sub-5 nm Ultrathin In2O3 Transistors for High-Performance and Low-Power Electronic Applications

ACS Appl Mater Interfaces. 2024 Apr 27. doi: 10.1021/acsami.4c01353. Online ahead of print.

Abstract

Ultrathin oxide semiconductors are promising candidates for back-end-of-line (BEOL) compatible transistors and monolithic three-dimensional integration. Experimentally, ultrathin indium oxide (In2O3) field-effect transistors (FETs) with thicknesses down to 0.4 nm exhibit an extremely high drain current (104 μA/μm) and transconductance (4000 μS/μm). Here, we employ ab initio quantum transport simulation to investigate the performance limit of sub-5 nm gate length (Lg) ultrathin In2O3 FETs. Based on the International Technology Roadmap for Semiconductors (ITRS) criteria for high-performance (HP) devices, the scaling limit of ultrathin In2O3 FETs can reach 2 nm in terms of on-state current, delay time, and power dissipation. The wide bandgap nature of ultrathin In2O3 (3.0 eV) renders it a suitable candidate for ITRS low-power (LP) electronics with Lg down to 3 nm. Notably, both the HP and LP ultrathin In2O3 FETs exhibit superior energy-delay products as compared to those of other common 2D semiconductors such as monolayer MoS2 and MoTe2. These findings unveil the potential of ultrathin In2O3 in HP and LP nanoelectronic device applications.

Keywords: ab initio quantum transport simulation; high-performance and low-power electronics; sub-5 nm gate length; ultrathin In2O3; wide bandgap.